Investigation of DVFS for network-on-chip based H.264 video decoders with truly real workload

Abstract

We investigate dynamic voltage and frequency scaling (DVFS) for a network-on-chip (NoC) based H.264 video decoder. The investigation is done using a simulation framework that combines both the communication, i.e. the NoC, and the processing, i.e., H.264 modules, components into the same simulation. This approach allows for the NoC to be exercised with truly real traffic instead of synthetic traffic because the H.264 modules process real data provided by the actual video streams supplied as input into the decoder. Therefore, the NoC design and optimization can be done by directly considering the workload under which the NoC will operate later on. Because truly real rather than synthetic traffic is utilized, evaluation of different NoC design choices is more accurate. Our investigation demonstrates that we are able to evaluate different NoC mapping solutions to asses the impact of a given DVFS strategy toward identifying optimal NoC design solutions for the specific case of an H.264 video decoder.