Investigation of critical charge and sensitive volume of the Neutron Intercepting Silicon Chip (NISC)

Abstract

A model for an unconventional new neutron detection system called Neutron Intercepting Silicon Chip (NISC) is presented in this study. The NISC is being investigated at the Pennsylvania State University, Radiation Science and Engineering Center. The NISC is based on recording soft error rate in semiconductor devices. The NISC can be used to detect thermal neutrons with a neutron monitoring/detection system by enhancing soft error occurrences in the memory devices. The NISC is envisioning as a miniature, power efficient, and active/passive operation neutron sensor/detector system for weapons of mass destruction sensing and recognition for homeland security and safeguards applications. In order to model and analyze the NISC, a toolkit, named NISC Soft Error Analysis Tool (NISCSAT), was developed and analysis were performed with a simple model with 10B-enriched layer on top of the lumped silicon region in order to represent the semiconductor memory node. Soft error probability calculations are performed with both single node and array configurations to investigate the device scaling by using different node dimensions in the model. Soft error contribution due to the BPSG layer is also investigated with different 10B content and the results will be presented.