Investigation of annealed, thin(∼2.6 nm)-Al2O3/AlGaN/GaN metal-insulator-semiconductor heterostructures on Si(111) via capacitance-voltage and current-voltage studies

Abstract

Annealed, thin(∼2.6 nm)-Al2O3/AlGaN/GaN metal-insulator-semiconductor (MIS) heterostructures on Si(111) are fabricated and studied via capacitance–voltage (C–V) measurements to quantify densities of fast and slow interface trap states and via current–voltage (I–V) measurements to investigate dominant gate current leakage mechanisms. Dual-sweep C–V measurements reveal small voltage hysteresis (∼1 mV) around threshold voltage, indicating a low density of slow interface trap states of ∼109 cm−2. Frequency-dependent conductance measurements show fast interface trap state density ranging from 8 × 1012 to 5 × 1011 eV−1 cm−2 at energies from 0.275 to 0.408 eV below the GaN conduction band edge. Temperature-dependent I–V characterizations reveal that trap-assistant tunneling (TAT) dominates the reverse-bias carrier transport while the electric field across the Al2O3 ranges from 3.69 to 4.34 MV cm−1, and the dominant Al2O3 trap state energy responsible for such carrier transport is identified as 2.13 ± 0.02 eV below the Al2O3 conduction band edge. X-ray photoelectron spectroscopy measurements on Al2O3 before and after annealing suggest an annealing-enabled reaction between Al-O bonds and inherent H atoms. Overall, we report that annealed, thin-Al2O3 dielectric is an effective (Al)GaN surface passivation alternative when minimizing passivation-associated parasitic capacitance is required, yet non-ideal for significantly suppressing gate leakage current in MIS structures due to the governing TAT carrier transport mechanism.