Investigation of Aging’s Effect on the Conduction and Switching Loss in SiC MOSFETs

Abstract

The long-term device and package degradations in SiC MOSFETs can affect the power converter’s performance. In this paper, the aging’s effect on the device’s conduction and switching loss is evaluated experimentally. A DC power cycling test is implemented to age the commercial SiC MOSFETs. From the experimental results, the conduction loss is observed to increase by ~9.7%. Both the gate trap induced threshold voltage shift and package degradation contribute to the on-resistance increase. In terms of the switching loss, the turn-on loss also increases after aging, and the increment depends on the operating conditions. Specifically, at high current level and low gate resistance, the turn-on loss increase is more significant. In the experimental result with 0 Ω gate resistance, more than 36% turn-on loss increase is observed at 600 V/ 20 A. From the switching transient waveforms, the turn-on loss variation mainly occurs during the turn-on current rise period and is caused by the package degradation. During the voltage falling period, a slight turn-on loss increase is observed because of the positive V th shift. In contrast, the turn-off loss variation after aging is not significant.