Abstract
A multiple-peak negative differential resistance (NDR) circuit made of standard Si-based metal-oxide-semiconductor field-effect-transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT) is demonstrated. We can obtain a three-peak I-V curve by connecting three cascoded MOS-HBT-NDR circuits by suitably designing the MOS parameters. This novel three-peak NDR circuit possesses the adjustable current-voltage characteristics and high peak-to-valley current ratio (PVCR). We can adjust the PVCR values to be as high as 11.5, 6.5, and 10.3 for three peaks, respectively. Because the NDR circuit is a very strong nonlinear element, we discuss the extrinsic hysteresis phenomena in this multiple-peak NDR circuit. The effect of series resistance on hysteresis phenomena is also investigated. Our design and fabrication of the NDR circuit is based on the standard 0.35 μm SiGe BiCMOS process.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
