Investigation of a Standard Particle Deposition System on Wafer Surface and Its Application to Wafer Cleaning

Abstract

One of the main factors affecting the production yield of semiconductor circuits is contamination by fine particles. Therefore, the wafer cleaning process has become important to the semiconductor manufacturing process. The best method for a cleaning evaluation is to use the actual wafers in the manufacturing process, but where a general cleaning evaluation is required, contaminated wafers cannot be obtained from this source. This study proposes a separate cleaning evaluation wafer as a method for the semiconductor cleaning evaluation. We here describe 300-mm wafers that had nanoparticles of silica (SiO2) and polystyrene latex spheres (PSLs) deposited in multiple designated areas by changing the electric field from 2 kV to 11.2 kV to make spots with diameter from 20 to 50 mm. A numerical analysis was performed to predict the particle trajectory during deposition, and the ensuing experimental results were in good agreement with the simulation, with an average error of 4.2%. Next, some actual wafers were cleaned to demonstrate possible cross-contaminations on the 300-mm wafer, and good effectiveness was achieved. These results provide useful data for optimizing cleaning conditions to improve semiconductor cleaning processes.