Investigating the Stability of Thin Film Transistors with Zinc Oxide as the Channel Layer

Abstract

The stability of thin film transistors with zinc oxide as the channel layer is investigated using gate bias stressing techniques. It is found that the application of low positive and negative stress results in the device transfer characteristics shifting in positive and negative directions respectively. However, low bias has no effect on the subthreshold characteristics. It is postulated that this device instability is a consequence of charge trapping at or near to the channel/insulator interface. The application of higher biases and longer stress times cause a degradation of subthreshold behaviour and is suggested to result from defect state creation within the ZnO layer. Similar behaviour is exhibited at elevated measurement temperatures. All stressed devices recover their original characteristics after a short period at room temperature without the need for any thermal or bias annealing.