Investigating the Impact of Imprecise Computation in Memristive Memory Arrays on the Classification Performance of Deep Fully Connected Neural Networks

Abstract

Hardware implementation of deep neural networks (DNNs) using digital hardware accelerators suffers from the inefficiency of the frequent transfer of network parameters from external memory, such as dynamic random access memory (DRAM), to the processing unit. One attractive solution to this problem is to replace the von Neumann architecture of digital systems with the concept called in-memory computation, where the computations are performed with lower precision but inside the memory array that eliminates the need to transfer the network parameters around. However, reducing the precision of computation can degrade the performance of DNN. In this article, we study the effect of using imprecise circuits, such as analog vector-by-matrix multipliers implemented with memristive crossbars, on the classification performance of fully connected neural networks and show that how by increasing the capacity of the network, we can increase the tolerance of the network to hardware defects.