Abstract
This letter studies the hot-carrier effect in indium-gallium-zinc oxide (IGZO) thin film transistors with symmetric and asymmetric source/drain structures. The different degradation behaviors after hot-carrier stress in symmetric and asymmetric source/drain devices indicate that different mechanisms dominate the degradation. Since the C-V measurement is highly sensitive to the trap state compared with the I-V characterization, C-V curves are utilized to analyze the hot-carrier stress-induced trap state generation. Furthermore, the asymmetric C-V measurements CGD (gate-to-drain capacitance), CGS (gate-to-source capacitance) are useful to analyze the trap state location in the channel. For the asymmetric device structure, the different source/drain structure under hot-carrier stress-induces an asymmetric electrical field and causes different degradation behaviors. In this work, the on-current and subthreshold swing (S.S.) degrade under low electrical field, whereas the apparent Vt shift occurs under a large electrical field. The different degradation behaviors indicate that trap states are generated under low electrical field and the channel-hot-electron (CHE) effect occurs under a large electrical field.
Published Version
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