Abstract
Top gate a-InGaZnO (IGZO) thin-film transistors (TFTs) annealed at high temperature show excellent initial current–voltage (I–V) characteristics. However, when they are exposed to positive gate bias for a long time, hump can occur in the subthreshold region. This abnormal hump is accelerated at a higher positive gate voltage and mitigate by a negative gate voltage. While the strength of the hump is irrelevant to a change in channel width, it relies significantly on channel length. This phenomenon might be due to mobile Na ions diffused from a glass substrate migrating toward the back and edge side of the IGZO semiconductor by a vertical gate electric field. When a layer of Al2O3 is formed between the IGZO semiconductor and the glass substrate, the hump phenomenon could be successfully solved by serving as a barrier for Na ions moving into the IGZO.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.