Investigating a Dual MOSCAP Variant of Line-TFET With Improved Vertical Tunneling Incorporating FIQC Effect

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In this article, we investigate a variant of the line-tunnel FET employing dual MOS–capacitor (MOSCAP) extensions incorporating field-induced quantum confinement (FIQC). Unlike Gate-over-Source (GoSo) TFET having an all-lateral design, dual-MOS (D-MOS) TFET has raised channel/drain regions exhibiting better electrostatics at the 2-D source boundary. At similar dimensions, 2-D-calibrated simulations reveal that under No-FIQC condition, D-MOS exhibits $2.1\times $ better ${I} _{ \mathrm{\scriptscriptstyle ON}}$ along with much improved parasitic leakage in the OFF-state ( ${V} _{ \mathrm{GS}}=\textsf {0}$ V, ${V} _{\textsf {DS}}=\textsf {1}$ V). Energy quantization due to FIQC in the conduction band (CB) near the gate dielectric is captured along with the reshaped carrier density distribution. The delay in the onset of vertical band-to-band tunneling (BTBT), $\Delta {V}_{\textsf {BTBT}}$ shift, and deterioration in ${I} _{ \mathrm{\scriptscriptstyle ON}}$ are also calculated. We later observe that the use of a dual-metal-gate (DMG) and an unequal lateral/vertical oxide thickness as structural improvements further eliminates the parasitic leakage. In addition, with the gate–drain underlap ( ${L} _{\textsf {GD}}$ ) up to 10 nm, a reduction in intrinsic delay is also observed.