Abstract
AbstractMonolithic integration of III–V materials and devices on CMOS compatible on‐axis Si (001) substrates enables a route of low‐cost and high‐density Si‐based photonic integrated circuits. Inversion boundaries (IBs) are defects that arise from the interface between III–V materials and Si, which makes it almost impossible to produce high‐quality III–V devices on Si. In this paper, a novel technique to achieve IB‐free GaAs monolithically grown on on‐axis Si (001) substrates by realizing the alternating straight and meandering single atomic steps on Si surface has been demonstrated without the use of double Si atomic steps, which was previously believed to be the key for IB‐free III–V growth on Si. The periodic straight and meandering single atomic steps on Si surface are results of high‐temperature annealing of Si buffer layer. Furthermore, an electronically pumped quantum‐dot laser has been demonstrated on this IB‐free GaAs/Si platform with a maximum operating temperature of 120 °C. These results can be a major step towards monolithic integration of III–V materials and devices with the mature CMOS technology.
Highlights
Monolithic integration of III–V materials and devices on CMOS compatinterconnects for data transmission
Three samples (A–C) were first studied, which were grown on microelectronic standard on-axis Si (001) substrates with random miscut angles within 0.15° ± 0.1° toward [110] orientation by solid-source molecular beam epitaxy (MBE) system
No 2 × 1 RHEED pattern was observed during the heating process and a high density of Inversion boundaries (IBs) was observed on the surface of the subsequently grown GaAs layer, as shown in the top-view of scanning electron microscope (SEM) image of Figure 1a
Summary
The formation of these wavy steps is a result of the interaction between different stress domains, which helps to reduce the net elastic energy of the Si surface at small offcut angle.[35,36] In contrast, clearly ordered Si steps are visible, and a zoomed-in measurement of those ordered Si steps is presented, showing a combination of alternating straight and meandering Si atomic steps.[16,37] The height of each step was measured around 0.13 nm, as shown, revealing the existence of only S steps instead of the D steps after the high-temperature annealing on Si buffer process.[38,39,40,41] It is well established that on-axis Si (001) surfaces, which have small offcut angle, exhibit terraces of alternating 2 × 1 and 1 × 2 dimerization separated by two types of S.[16,37,42] Based on Chadi's nomenclature, these two step types are denoted as Sa and Sb.[43] Sb steps are relatively rough while Sa steps are straight, as shown in the schematic diagram in the inset of Figure 2c. The further improvement of GaAs/Si interface quality can be achieved by carefully controlling III–V on Si nucleation process and compensate any excess of Ga droplet before it etched the Si buffer layer.[46,47]
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