Abstract
The MULTIBUS II architecture is an open system bus architecture for general purpose 8-, 16- or 32-bit microcomputer systems design. The architecture incorporates multiple buses, allowing the designer to configure a system using the various buses to satisfy the cost and performance needs of his particular application. The parallel system bus iPSB contains a variety of advanced bus concepts that aim to enhance performance, reliability and ease of use. This article focuses on the advanced concepts of the iPSB bus.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
