Introduction of Si∕SiO2 interface states by annealing Ge-implanted films

Abstract

Nanocrystals embedded in SiO2 films are the subject of a number of recent works, mainly because of their potential usefulness in the fabrication of optoelectronic devices and nanocrystal memory structures. One interesting method for the fabrication of such nanocrystals is the ion implantation of segregating species into SiO2 films followed by heat treatment in order to induce nanocrystal formation. This method is both relatively simple and also compatible with the current MOS (metal-oxide-semiconductor) device technology. An unintentional effect can occur during the fabrication of nanocrystals using this method, namely a significant diffusion of the implanted species during annealing, away from the regions with the highest concentration. The Si∕SiO2 interface can be exposed to this diffusion flux. This can result in an altered interface and have a significant influence on electronic devices. Here, we report on ion implantation of Ge into SiO2 on Si followed by annealing under conditions, resulting in Ge accumulation at the Si∕SiO2 interface as determined by secondary-ion mass spectroscopy analysis, transmission electron microscopy with energy dispersive analysis of x-rays, and Rutherford backscattering spectrometry. The accumulation of Ge at the Si∕SiO2 interface has also been reported before. The resulting effect on the electronic structure of the interface is a priori unknown. We have fabricated MOS capacitors on the sample structures and their capacitance-voltage characteristics were measured and analyzed. We measure an interface state density around 1×1012cm−2, which is high compared to standard Si MOS devices. We discuss the results in terms of the previous electrical measurements on Ge-oxide interfaces and SiGe interfaces, which also can yield a high interface state density. The specific conditions we report result in a sufficiently low Ge concentration that nanocrystals are not segregated in the SiO2 film, while Ge still accumulates at the Si∕SiO2 interface after annealing.