Abstract

Real Time Control (RTC) for the Space Interferometry Mission will build on the real time core interferometer control technology under development at JPL since the mid 1990s, with heritage from the ground based MKII and Palomar Testbed Interferometer projects developed in the late '80s and early '90s. The core software and electronics technology for SIM interferometer real time control is successfully operating on several SIM technology demonstration testbeds, including the Real-time Interferometer Control System Testbed, System Testbed-3, and the Microarcsecond Metrology testbed. This paper provides an overview of the architecture, design, integration, and test of the SIM flight interferometer real time control to meet challenging flight system requirements for the high processor throughput, low-latency interconnect, and precise synchronization to support microarcsecond-level astrometric measurements for greater than five years at 1 AU in Earth-trailing orbit. The electronics and software architecture of the interferometer real time control core and its adaptation to a flight design concept are described. Control loops for pointing and pathlength control within each of four flight interferometers and for coordination of control and data across interferometers are illustrated. The nature of onboard data processing to fit average downlink rates while retaining post-processed astrometric measurement precision and accuracy is also addressed. Interferometer flight software will be developed using a software simulation environment incorporating models of the metrology and starlight sensors and actuators to close the real time control loops. RTC flight software and instrument flight electronics will in turn be integrated utilizing the same simulation architecture for metrology and starlight component models to close real time control loops and verify RTC functionality and performance prior to delivery to flight interferometer system integration at Lockheed Martin's Sunnyvale facility. A description is provided of the test environment architecture supporting the RTC path to flight.

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