Interference compensation technique for multilevel flash memory

Abstract

Multilevel cell flash memory devices are gaining popularity because it can increase the memory capacity by storing two or more bits to a single cell. However, when the number of levels of a cell increases, the inter-cell interference which shifts cell (threshold) voltage becomes more critical. Thereare two approaches to alleviate the errors caused by the voltage shift. One is the error correcting codes, and the other is the signal processing methods. We focus on signal processing methods to reduce the cell to cell interference which causes the voltage shift, and propose algorithms which reduce the voltage shift effects by classfying and compensating erratic cells. The simulation results show that the proposed algorithms are effective for interference reduction.