Interfacial transition regions at germanium/Hf oxide based dielectric interfaces: Qualitative differences between non-crystalline Hf Si oxynitride and nanocrystalline HfO 2 gate stacks

Abstract

The contribution from a relatively low-K SiON ( K ∼ 6) interfacial transition region (ITR) between Si and transition metal high-K gate dielectrics such as nanocrystalline HfO 2 ( K ∼ 20), and non-crystalline Hf Si oxynitride ( K ∼ 10–12) places a significant limitation on equivalent oxide thickness (EOT) scaling. This limitation is equally significant for metal-oxide-semiconductor capacitors and field effect transistors, MOSCAPs and MOSFETs, respectively, fabricated on Ge substrates. This article uses a novel remote plasma processing approach to remove native Ge ITRs and bond transition metal gate dielectrics directly onto crystalline Ge substrates. Proceeding in this way we identify (i) the source of significant electron trapping at interfaces between Ge and Ge native oxide, nitride and oxynitride ITRs, and (ii) a methodology for eliminating native oxide, or nitride IRTs on Ge, and achieving direct contact between nanocrystalline HfO 2 and non-crystalline high Si 3N 4 content Hf Si oxynitride alloys, and crystalline Ge substrates. We then combine spectroscopic studies, theory and modeling with electrical measurements to demonstrate the relative performance of qualitatively different nanocrystalline and non-crystalline gate dielectrics for MOS Ge test devices.