Abstract

We report on electrical and microscopic investigations aimed to clarify the origin of near-interface traps (NITs) in metal–silicon dioxide–4H-silicon carbide structures. Using capacitance–voltage and thermal dielectric relaxation current (TDRC) analysis we investigated NITs close to the 4H-SiC conduction-band edge in differently prepared thermal and deposited oxides and found that the traps give rise to two characteristic TDRC signatures belonging to two groups of trap levels. The total trapped charge exceeds 1×1013cm−2. The observed density and energy distribution of these traps are nearly identical in all thermal and deposited oxides investigated, suggesting that the NITs belong to intrinsic defects at the SiO2∕SiC interface which are readily formed during oxide deposition or thermal oxidation of 4H-SiC. Using high-resolution electron microscopy combined with nanochemical analysis (electron energy-loss near-edge spectroscopy and energy-filtered transmission electron microscopy) we investigated the SiO2∕SiC interface in samples receiving reoxidation and did not find any indication of graphitic regions at or near the SiO2∕SiC interface or in the bulk silicon dioxide within a detection limit of 0.7nm. In addition, no amorphous carbon accumulation was observed near the SiO2∕SiC interface. The overall results strongly suggest that the NITs near the 4H-SiC conduction band are not related to carbon structures in the SiO2∕SiC interlayer.

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