Interface thermal characteristics of flip chip packages – A numerical study

Abstract

Flip chip ball grid array (FC-BGA) packages are commonly used for high inputs/outputs (I/O) ICs; they have been proven to provide good solutions for a variety of applications to maximize thermal and electrical performance. A fundamental limitation to such devices is the thermal resistance at the top of the package, which is characterized θ JC parameter. The die-to-lid interface thermal resistance is identified as a critical issue for the thermal management of electronic packages. This paper focuses on the effect of the interface material property changes on the interface thermal resistance. The effect of package’s junction to case (Theta-JC or θ JC) thermal performance is investigated for bare die, flat lid and cup lid packages using a validated thermal model. Thermal performance of a cup or flat lid attached and bare die packages were investigated for different interface materials. Improved Theta-JC performance was observed for the large die as compared to the smaller die. Several parametric studies were carried out to understand the effects of interface bond line thickness (BLT), different die sizes, the average void size during assembly and thermal conductivity of interface materials on package thermal resistance.