Interface Engineering Enables Multilevel Resistive Switching in Ultra-Low-Power Chemobrionic Copper Silicate.

Abstract

Memristor is assuming prominence due to its exceptionally low power consumption, adaptable, and parallel signal processing capabilities that address the limitations of the von Neumann architecture to meet the growing demand for advanced technologies such as artificial intelligence, Internet of Things (IoTs), and neuromorphic computation. In this work, we demonstrate resistive switching in copper silicate-based hollow tube-forming self-organized membrane structures belonging to the category of chemobrionics or chemical gardens to demonstrate cost-effective and highly efficient memristor devices. The device architecture is configured as ITO/PEDOT:PSS/active layer (copper silicate)/PMMA/Ag, an arrangement that serves to stabilize current-voltage hysteresis and exhibit a low SET voltage ∼0.2 V with a 0.8 nJ power consumption while manifesting robust data endurance and multilevel resistive switching. The inherent self-rectifying behavior, characterized by a high rectification ratio of 60, underscores the potential utility of these devices across a spectrum of electronic applications. To emulate the functionality of biological synapses, fundamental synaptic characteristics are assessed, including paired-pulse facilitation (PPF) and potentiation and depression (P&D). We validate the potential of copper silicate chemical garden-based memristor devices for applications that require real-time synaptic processing. Importantly, the fabrication of these devices was accomplished through a comprehensive solution-based, low-temperature process conducted under ambient environmental conditions, obviating the need for specialized glovebox facilities.