Abstract
Multistage interconnection networks are very promising for shared-memory multiprocessor systems. These networks offer flexibility, scalability, and good performance-cost ratio. However, under a non-uniform traffic pattern, the performance of multistage interconnection networks suffers greatly because of hot spot traffic contention. The potential performance degradation due to even moderate hot spot traffic was found to be very significant, severely reducing all memory access, not just to shared locations [1]. Several techniques have been proposed to reduce the effects of hot spot and tree saturation contentions in multistage interconnection networks. These include multibuffered switching nodes, multipath networks, and request combining [2]. Request combining strategy was found to be an effective method of reducing the tree saturation problem [1]. Some request combining approaches have been proposed [1,3–5]. This paper proposes a new request combining based architecture to reduce the hot spot performance degradation. This approach is referred to as interconnection network front-end controller combining (IN-FEC). In IN-FEC, the interconnection network combines requests to the shared memory location, and the memory front-end controllers are used to decombine the combined request and distribute the results. Simulation results show considerable throughput enhancement under IN-FEC for an Omega network.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.