Abstract

Prototyping using multi-FPGA systems offers significant advantages over simulation and emulation based pre-silicon verification techniques. Multi-FPGA prototyping follows a complex design flow where the quality of associated tools and the architecture of interconnect topology play a very important role in the performance of final prototyped design. A well designed interconnect topology may remain underutilized because of a poor routing tool and vice versa. This makes the selection of a good routing tool and the exploration of interconnect topologies extremely important for the quality of final design. In this work, we present a detailed comparison between six inter-FPGA interconnect topologies. We present a generic routing tool and for each topology, ten large, complex benchmarks are prototyped on four FPGA boards using this tool. Experimentation reveals that fully customized interconnect topology using a hybrid combination of direct two and multi point tracks gives the best frequency results for all the FPGA boards. On average, this topology gives 26.2, 28.5, 9.5, 32.1 and 12.4% better frequency results as compared to five other interconnect topologies. We also perform routing time comparison and the topology using generic hybrid combination of direct two and multi point tracks gives the best results. On average, this topology produces 1.8×, 2×, 2×, 9.2×, and 4.4× better results as compared to five other topologies under consideration. Frequency–time tradeoff analysis along with flexibility and setup time of different topologies is also performed. It reveals that a partially customized topology with hybrid combination of direct two and multi point tracks gives the best frequency–time tradeoff for smaller FPGA boards while a partially customized topology with switch-based and multi point connections gives the best results for larger FPGA boards with reasonable flexibility and moderate setup time.

Highlights

  • The advancement of processing technology and improved design tools have tremendously increased the computation capability of modern digital systems

  • Results presented are mainly divided into two parts: first we present the mux ratio, frequency comparison results for six interconnect topologies and we present routing time analysis of each interconnect topology

  • A comprehensive exploration and comparison of six inter-Field Programmable Gate Array (FPGA) interconnect topologies for multi-FPGA systems is presented. This exploration focuses on the evaluation of performance and routing time metrics of different interconnect topologies under consideration

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Summary

Introduction

The advancement of processing technology and improved design tools have tremendously increased the computation capability of modern digital systems. Emulation based platforms [9,10,11] offer better execution speed as compared to simulators with complete system visibility, huge logic capacity and debugging capability. They are, prohibitively expensive and require large setup time. Different studies have been carried out in the past on interconnect routing topologies and inter-FPGA routing approaches These studies have mainly aimed at improving the execution speed by reducing the multiplexing ratio and the number of intermediate hops by using fixed routing topologies and approaches. We explore six different inter-FPGA interconnect topologies through our indigenously developed, generic inter-FPGA routing tool.

Related work
Exploration flow
Benchmark generation and synthesis
Multi-FPGA partitioning
Inter-FPGA routing
Graph generation
MUX ratio computation and cut net grouping
Cut-net routing
Mux ratio optimization and frequency estimation
Intra-FPGA place and route
Interconnect topologies
Results and analysis
MUX ratio and frequency comparison results
Routing time comparison results
Conclusion
Full Text
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