Intelligent MOL(Middle-Of-Line) Design Methodology for 3D FinFET Manufacturability

Abstract

This research is an outstanding first study on the intelligent design methodology of the core MOL scheme. It can maximize the manufacturability of 3D FinFET technology that is mainly used for foundry AP products ranging from 10nm to 5nm.In order to realize various MOL structures, 3D virtual process simulation considering plasma and surface reaction was implemented, and based on this, the generation of gate to contact short, a chronic defect in FinFET MOL scheme, could be detected without decap. Futhermore, for the feature selection, the process factor sensitivity analysis was performed with the Monte carlo algorithm, which is one of the representative reinforcement learning techniques, and it was found that the key factors of defect were gate to contact misalign and contact etch angle. In the Gate-to-Contact 3D minimum distance probability distribution function generated by millions of samplings based on this intelligent algorithm, the failure criteria can be obtained by mapping with the number of fail bits detected in the wafer.As the device's scaling limit was reached, SCE-driven FEOL(Front-End-Of-Line) characteristics as well as the MOL parasitics' portion became very huge in the 10 nm or less FinFET technology, but all studies have been limited to the effects of device performance via RC(Resistance-Capacitance) analysis.On the other hand, our methodology provides a 3D minimum distance 5.7nm specification for a defect-free MOL structure for the first time, and provides conditions to meet Gate to CNT short zero at the current process capability level when improving M/A 4.5nm and etch ang 1.5o. In silicon, the same result was obtained as predicted. Figure 1