Intellectual property protection and security of SoCs — An embedded tutorial

Abstract

VLSI designs and hardware cores are reused in order to meet the design specifications on time, considering the numerous constraints imposed by nanometer technology. Electronic description of a VLSI design or a hardware core is an intellectual property (IP), and may be infringed upon either in the design house, or the fabrication facility, or at the time of its reuse in a system. This mandates incorporating techniques for intellectual property protection in the VLSI design flow. The IP of a VLSI design, which culminates in fabrication of the integrated circuit, differs from other sources of IPs such as image, text, because in addition to its physical and structural description, it also has a behavioral specification which should remain unaltered by any IP protection technique. IPs at the design level are editable and hence more flexible for reuse yet more vulnerable to misappropriation. Security in activation of chips, especially in embedded systems, is an equally grave issue and has led to the paradigm of design-for-security. This embedded tutorial aims at presenting the major concerns in IP security and the challenges to implement the countermeasures and retain their effectiveness in the entire life cycle. The nature of threats are broadly categorized as (i) misappropriation by hacking during electronic commerce and intentional reselling, and (ii) unauthorized design retrieval. Various mechanisms such as encryption and obfuscation, watermarking and fingerprinting for countering misappropriation of category (i) will be addressed. Analytic methods derived from the behavioral aspect specific to chip designs and effective for category (ii), will be discussed. Finally, it focuses on the practical issues in semiconductor technology and IP commerce which pose difficulty in ensuring a safe cycle for an IP.