Abstract
Integration in power semiconductor devices has been always a challenge for technologists. This occurs mainly because the integration process increases the power density with negative consequences in the temperature of the devices which deteriorate the electrical and reliability performance in comparison with discrete approach. In order to successfully integrate power microelectronic devices one needs to have semiconductor solutions with extremely good efficiency to dissipate small quantities of heat and package solutions that can conduct extremely well the heat generated so the junction temperature of the device does not exceed the maximum temperatures under specifications. Traditional approaches to improve efficiency in DC/DC synchronous buck converters include reducing conduction losses in the MOSFETs through lower RDS(ON) devices and lowering switching losses through low-frequency operation. However the incremental improvements in RDS(ON) are at a point of diminishing returns and low RDS(ON) devices have large parasitic capacitances that do not facilitate the high-frequency operation required to improve power density. The drive for higher efficiency and excellent thermal performance to achieve high degree of integration is being addressed by advancements in both silicon and packaging technologies. In this paper we present the Power Stage concept, the technology we developed in the silicon and packaging fronts in order to integrate a half bridge DC-DC synchronous Buck converter with a gate driver IC. The NexFET Power Stage achieves higher levels of performance and integration, and in half the space versus discrete MOSFETs. This article explains these new technologies and highlights their performance advantage.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have