Integration of E-core DC reactor based on thyristors with hybrid HVDC breaker

Abstract

In general, the fault current in high-voltage direct current (HVDC) grids has two characteristics: the rapid increase and the lack of a zero-crossing point. Therefore, a large reactor is necessary to fulfill DC fault current limiting. But this can have disadvantages on the dynamics and stability of the HVDC grid. In this paper, the integration of an E-core DC reactor based on thyristors with a hybrid HVDC breaker (RTHCB) is suggested as a solution. The proposed model reduces the rising rate and peak of the fault current and protects the LCS through the primary inductance of the reactor. In RTHCB, several capacitors and thyristors are placed in parallel with the secondary winding of the reactor to control the gradual and soft placement of the large inductance in the path of the fault current. This integration reduces the electrical stresses caused by the sudden disconnection of conventional HCBs. Due to the presence of the capacitors, the energy absorbed by the arrester decreases. In addition, it decreases semiconductor switches and absorbs fault energy in a short time. After theoretical analysis, the RTHCB is modeled on the 3D space of the COMSOL Multiphysics. Finally, an MMC-HVDC grid has been simulated in the PSCAD/EMTDC to validate the performance of RTHCB.