Integration mixer: An efficient mixed neural network for memory dynamic stability analysis in high dimensional variation space

Abstract

In low-power designs, the SRAM performance suffers from the process variation. Statistical analysis for the yield of circuit block (e.g., static random-access memory) is extremely time-consuming due to the expensive simulations since the variation space is high-dimensional. In this paper, we construct a mixed neural network to substitute the simulation. We present Mixer. It mainly contains two types of layers: one with regularized sub-radial basis function networks (sub-RBFs) applied independently to extract the effects on circuit performance of the subsets of input process variables, and the other one with multi-layer perceptron (MLP) applied to learn the connection of these extracted effects. When trained with small datasets of high dimension generated from 28 nm memory circuits, our Mixer shows competitive accuracy and efficiency compared with other state-of-the-art models.*