Integrating HDL synthesis and partitioning for multi-FPGA designs

Wen-Jong Fang Wen-Jong Fang,A.C.-H Wu

doi:10.1109/54.679209

Integrating HDL synthesis and partitioning for multi-FPGA designs

Wen-Jong Fang Wen-Jong Fang, A.C.-H Wu

https://doi.org/10.1109/54.679209

Copy DOI

Journal: IEEE design & test	Publication Date: Jan 1, 1998
Citations: 7

Affiliation: Tsinghua University

#multi-FPGA Partitioning #HDL Synthesis + Show 8 more

Abstract
Full-Text PDF
Similar Papers

Abstract

The authors examine the interaction of HDL synthesis and multi-FPGA partitioning on designs with varying structural characteristics and HDL coding styles. They demonstrate that an integrated synthesis and partitioning methodology is crucial to achieving high-density designs.

Full Text