Abstract

A different approach to teaching digital systems design using hardware description languages (HDLs) within a limited time budget is presented. The proposed approach modifies the content of the lectures, placing more emphasis on the functional verification of hardware designs as opposed to the established method of teaching HDL semantics and syntax. The educational research study conducted by the author and the Office of Institutional Research, Planning, and Assessment, Rose-Hulman Institute of Technology, Terre Haute, IN, suggests that the extensive coverage of functional verification: 1) improves the learning process and the achievement of concepts and skills in digital design; and 2) encourages a deeper approach to learning, producing highly qualified graduates for today industry's needs.

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