Abstract
In this paper, integrated voltage regulators (IVRs) with a cascode bridge circuit composed of a high-side (HS) NMOS power switch and a dedicated bootstrap driver using a vertical body channel (BC) MOSFET are proposed for improving efficiency under 100 MHz switching frequency. The proposed circuit utilizes the back-bias effect free characteristic of the vertical BC MOSFET without additional well structures such as a triple-well structure for efficiency enhancement. Power switching of twice the process voltage VMAX with an HS NMOS power switch is realized by a novel circuit technique that directly connects the bootstrap node to the gate of an n-type MOSFET connected to the input voltage. Moreover, by using a vertical BC MOSFET free from the back-bias effect, the on-resistance increase of the HS NMOS power switch due to the high input voltage is significantly suppressed, and the drain-to-source voltage of MOSFETs in the off-state is distributed uniformly in comparison with that of a planar MOSFET. The proposed IVR of 3.3 V input voltage and 1.2 V output voltage is designed and simulated by HSPICE. Additionally, the power transistor size dependence of efficiency indicated that the proposed IVR can achieve a 4.2% higher peak efficiency than the conventional IVR with a 26% smaller total power transistor size.
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