Abstract
This paper presents an energy-aware CAD methodology for the system-level exploration of hierarchical storage organizations, focusing mainly on data-intensive signal processing applications. Starting from the high-level behavioral specification of a given application, several memory management tasks are addressed in a common algebraic framework, using data-dependence analysis techniques similar to those used in modern compilers. This software system can compute the minimum data storage required by a given application and can produce the graph of storage variation during the code execution; it can perform an energy-efficient assignment of the multidimensional signals from the specification to the memory layers, followed by a storage-efficient mapping of signals to the physical memory. The last phase of the methodology is a novel approach for power-efficient banking of the on-chip memory.
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