Integrated Protection Circuits for an NMOS Silicon Carbide Gate Driver Integrated Circuit

Abstract

Recent work has been done to build a Silicon Carbide (SiC) gate driver IC for use with a 1,200V SiC power MOSFET. Protection circuits form an important part of the complete gate driver/power device system. Under-voltage lockout (UVLO) protection disables the gate driver when power supplies are insufficient to turn the power device fully on. Desaturation detection provides protection to the power device by recognizing over-current conditions and disabling the gate driver for a set duration. The protection circuits described in this paper are integrated with a novel SiC gate-driver architecture utilizing discrete 20 V and 40 V power supplies. Two separate UVLO circuits monitor these power supplies while being powered by the 20 V supply. The desaturation detection circuit ensures that the power device is in its safe operating area. The desaturation detection circuit is designed to work with a 20A SiC MOSFET in less than 500ns, while avoiding false triggering on leading-edge spikes. Bench test results of the two UVLOs and desaturation detection circuits were captured and are compared to simulated results.