Abstract

Silicon photonics integrated circuits (Si-PIC) with well-established active and passive building elements are progressing towards large-scale commercialization in optical communications and high speed optical interconnects applications. However, current Si-PICs do not have memory capabilities, in particular, the non-volatile memory functionality for energy efficient data storage. Here, we propose an electrically programmable, multi-level non-volatile photonics memory cell (PMC) fabricated by standard complementary-metal-oxide-semiconductor (CMOS) compatible processes. A micro-ring resonator (MRR) was built using the PMC to optically read the memory states. Switching energy smaller than 20 pJ was achieved. Additionally, a MRR memory array was employed to demonstrate a four-bit memory read capacity. Theoretically, this can be increased up to ~400 times using a 100 nm free spectral range broadband light source. The fundamental concept of this design provides a route to eliminate the von Neumann bottleneck. The energy-efficient optical storage can complement on-chip optical interconnects for neutral networking, memory input/output interfaces and other computational intensive applications.

Highlights

  • Computers have deeply impacted our daily lives in various fields and greatly improved the quality of life[1]

  • The photonics memory cell (PMC) is programmed by applying a positive voltage on the control gate, while the drain and source are grounded

  • Power consumption can be reduced by decreasing the ON state wavelength shift from the OFF state and shrinking the micro-ring resonator (MRR) size

Read more

Summary

Introduction

Computers have deeply impacted our daily lives in various fields and greatly improved the quality of life[1]. Optical interconnection addresses the data bandwidth limitations faced by copper lines[2], and silicon photonics have been a leading technology solution in this field[3,4,5,6,7,8,9,10]. A non-volatile integrated optical memory on the PIC is a natural progression to enhance memory storage functionality for optical interconnects of the paradigm in applications such as high performance computing[11,12] and neural networking[13]. For process compatibility with the Si-PIC, a CMOS-compatible technology is generally preferred Along this line, a silicon photonics with electrically erasable programmable read-only memory was suggested with simulated results to determine its feasibility[23]. This letter bridges the existing gap by proposing a photonics memory cell (PMC) for memory functionality in silicon photonics

Methods
Results
Conclusion
Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call