Integrated Inductor Model Verification for Microwave LC-filters in Si and SiGe Systems on a Chip

Abstract

In this paper, the conductor model that can be used to design of various inductor layout configurations for any Si and SiGe technological processes is considered. The experimental prototypes of the test inductors were produced in the standard SiGe BiCMOS 130 nm process to verify the model. The chips measuring results showed that the characteristics of the prototypes taking into account the manufacturing tolerance are in the range of model simulated values. It has been found that the proposed model has a better convergence with the prototypes characteristics than 3D modeling. The equivalent circuit simulation speed can be orders of magnitude higher than the 3D simulation speed. The proposed model accuracy is achieved by taking into account the skin-effect and edge-effects in the dielectric and substrate. Using the skin-effect equivalent circuit the model can be run in Cadence Specter Simulator. It is necessary for the microwave LC-filters development.