Integrated freestanding single-crystal silicon nanowires: conductivity and surfacetreatment

Abstract

Integrated freestanding single-crystal silicon nanowires with typical dimension of100 nm × 100 nm × 5 µm are fabricated by conventional 1:1 optical lithography and wet chemical silicon etching. Thefabrication procedure can lead to wafer-scale integration of silicon nanowires in arrays. Themeasured electrical transport characteristics of the silicon nanowires covered with/withoutSiO2 support a model of Fermi level pinning near the conduction band. TheI–V curves of the nanowires reveal a current carrier polarity reversal depending on Si–SiO2 and Si–H bonds on the nanowire surfaces.