Instruction set independent program encoding

Abstract

Instruction encoding techniques have been designed for reducing the program memory footprint and improving processors performance. However, many techniques are instruction-set dependent thus minimizing the adoption in different application domains and target processors. This paper presents an instruction encoding technique and a software framework tool for the design of instruction encoders independent of the instruction set. Our approach is based on (1) a methodological extension of a pattern based instruction word (PBIW) algorithm for instruction encoding; (2) the design and implementation of a software framework for minimizing the design time frame of different instruction encoding algorithms; (3) a comprehensive set of experiments showing the impacts of those techniques on memory footprint, program performance, and processor design. Our proposed framework has been used to encode a wide range of programs compiled for the $$\rho $$?-VEX and SPARCv8 instruction sets. The experiments show that the framework makes it able to match the PBIW encoding technique to different ISAs and target machines. The results with SPECint00, Media, MiBench, and simple benchmarks show a compression ratio up to 0.54 (46 % of size reduction) for PBIW-SPARC programs and up to 0.59 for PBIW-VEX programs. Encoded SPARC programs have a performance speedup up to 1.7 compared to non-encoded SPARC programs.