Abstract
This paper presents the considerations of choosing an optimal instruction cache configuration including the line size, the associativity, and the cache size by examining the instruction references behavior. A program taxonomy classifies instruction reference streams into three class of workloads. This helps a cache designer both in deciding the best configuration and in evaluating all spectrum of workloads with a minimal test set. The line size is determined by the size of dynamic basic blocks and the line utilization of a trace. The associativity depends on the hit time and the hardware cost. The optimal cache size is obtained by examining the effective working space and the header of a trace. Finally, the phase separation concept is introduced. Programers and compiler writer can take advantage of the characteristics to reduce the miss ratio without other expenses.
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