Instability of phosphorous doped SiO2 in 4H-SiC MOS capacitors at high temperatures

Abstract

In this paper, the effect of inclusion of phosphorous (at a concentration below 1%) on the high temperature characteristics (up to 300 °C) of the SiO2/SiC interface is investigated. Capacitance–voltage measurements taken for a range of frequencies have been utilized to extract parameters including flatband voltage, threshold voltage, effective oxide charge, and interface state density. The variation of these parameters with temperature has been investigated for bias sweeps in opposing directions and a comparison made between phosphorous doped and as-grown oxides. At room temperature, the effective oxide charge for SiO2 may be reduced by the phosphorous termination of dangling bonds at the interface. However, at high temperatures, the effective charge in the phosphorous doped oxide remains unstable and effects such as flatband voltage shift and threshold voltage shift dominate the characteristics. The instability in these characteristics was found to result from the trapped charges in the oxide (±1012 cm−3) or near interface traps at the interface of the gate oxide and the semiconductor (1012–1013 cm−2 eV−1). Hence, the performance enhancements observed for phosphorous doped oxides are not realised in devices operated at elevated temperatures.