In-situ diagnosis of solder joint failure by means of thermal resistance measurement

Abstract

Solder connections provide an electrical and mechanical connection between components and PCB (Printed Circuit Board) in electronic devices. It is very important to develop a reliable method to detect the cracks in the quality control field of solder joints. When a crack is generated in the solder joint, parts of the solder are replaced by air gaps, leading to an increase of the thermal resistance in the heat transfer path. As a result, the detection of the changes of the thermal resistance could give the information of crack ratio in the solder joint. In this study, a non-destructive and in-situ crack detection method is proposed based on the measurement of thermal resistance. This study indicates that the thermal resistance from heat source to cooling plate of a sample will not only affected by crack ratio but also the relative location of crack and the heat source. The relationship between thermal resistance and crack ratio of a given solder area is examined experimentally and numerically on FET (Field Effect Transistor) samples with different solder areas. Further numerical simulation is carried out on the larger FET to determine the upper and lower limit of the Rth in relation to crack ratios. The findings demonstrate that a crack ratio range, which describes minimum and maximum ratio of existing crack(s), could be obtained by measuring the thermal resistance from heat source to cooling plate.