Insinhts on the DC Characterization of Ferroelectric Field-Effect-Transistors

Abstract

In this work, we report on the fabrication, characterization, and modeling of ferroelectric field-effect- transistors (FeFET). We demonstrate that polarization switching within ordinary 1T ferroelectric memory devices under specific conditions results in the measurement of subthreshold slopes $ , near-zero hysteresis, negative drain induced barrier lowering (N-DIBL), and negative differential resistance (NDR) (Fig. 1). The polarization switching origin is identified by a strong dependence on the magnitude of the gate voltage, where below the critical gate voltage required to switch polarization, $\mathrm{SS} , near-zero hysteresis, and negative DIBL cannot be observed. Further, we identify the source of NDR in the output characteristics to result from polarization switching near the drain of the FeFET at 10w $\mathrm{V}_{\mathrm{GS}}$ and high $\mathrm{V}_{\mathrm{DS}}$ . The NDR can be reproduced by a simple analytical model where two VT are present within the FeFET channel due to a non-uniform distribution of the polarization charge along the channel length. The intent of this work is to disambiguate and draw distinction between the effects of polarization switching in FeFET memory devices from that of negative capacitance as shown in Kwon et. al. [1], where a physically thicker oxide shows all the electric nronerties of a nhvsicallv thinner dielectric.