Input Voltage Mapping Optimized for Resistive Memory-Based Deep Neural Network Hardware

Abstract

Artificial neural network (ANN) computations based on graphics processing units (GPUs) consume high power. Resistive random-access memory (RRAM) has been gaining attention as a promising technology for implementing power-efficient ANNs, replacing GPU. However, nonlinear ${I}$ – ${V}$ characteristics of RRAM devices have been limiting its use for ANN implementation. In this letter, we propose a method and a circuit to address issues due to the nonlinear ${I}$ – ${V}$ characteristics. We demonstrate the feasibility of the method by simulating its application to multiple neural networks, from multi-layer perceptron to deep convolutional neural network based on a typical RRAM model. Results from classifying datasets including ImageNet show that the proposed method produces much higher accuracy than the naive linear mapping for a wide range of nonlinearity.