Input Current Ripple Minimization in Coupled SIDO Boost Converter by Shift of Gate Pulses

Abstract

The demand for different DC voltage levels is increasing due to portable electronic devices, electric vehicles, hybrid energy systems, renewable energy systems, etc. The single input dual output (SIDO) converter is a cost-efficient option to generate two different output voltages instead of two single input single output (SISO) converters. The SIDO converters have reduced component count, reduced losses, and increased efficiency. The addition of an inversely coupled inductor to the SIDO converters further reduces its physical size because of only one core. The input current ripples in DC-DC converters need to be as low as possible because it reduces the input filter requirement in addition to several other benefits. This paper minimizes the input current ripples of coupled inductor SIDO (CI-SIDO) boost converter by shifting gate pulses. This method reduces the input current ripple without the addition of any extra circuit elements. The shift is calculated where input current is minimum for all possible input, output voltages, and coupled inductor parameters. The obtained shift is verified by simulations in MATLAB/Simulink and experiments using a laboratory prototype.