Input Admittance Calculation of the Modular Multilevel Converter using a Linearized Dynamic Phasor Model

Abstract

Impedance-based stability analysis of voltage-source-converter-based high-voltage direct current (VSC-HVDC) systems evaluates interactions between power electronic converters and AC/DC systems by using their small-signal input admittances. Such an analysis requires an accurate calculation of the input admittance of the converter. This paper presents a method to approximate the input admittance of the modular multi-level converter (MMC) observed from its AC and DC terminals using a linearized dynamic phasor model. A nonlinear dynamic phasor model using variables in the stationary ABC frame is developed and linearized. The linearized dynamic phasor model is verified against a detailed nonlinear benchmark PSCAD model including submodule switching. Frequency scans are applied at corresponding inputs of the linear model to obtain small-signal transfer functions representing AC and DC input admittances of the converter. The resulting transfer functions are also verified against the PSCAD benchmark model.