InP HEMTs for Sub-mW Cryogenic Low-Noise Amplifiers

Abstract

This paper reports on a 100-nm gate length InP high-electron-mobility transistor (HEMT) technology for cryogenic low-noise amplifiers (LNAs) with ultra-low power dissipation of $112~\mu \text{W}$ . This result was obtained by using 100-nm gate length InP HEMTs with improved transconductance at low drain current through a scaled-down gate-channel distance while maintaining a low gate leakage current with the use of an InP etch stop layer and Pt gate metal. The noise performance of InP HEMTs was demonstrated in a 4–8 GHz (C–band) three-stage hybrid LNA at the ambient temperature of 5 K. At a dc power dissipation of $300~\mu \text{W}$ , the average noise temperature was 2.8 K with 27 dB gain. At a dc power dissipation of $112~\mu \text{W}$ , the LNA exhibited an average noise temperature of 4.1 K with a gain of 20 dB. The presented results demonstrate the large potential of InP HEMT technology for sub-mW cryogenic LNA design.