In-Memory Computing with TCAM for Packet Identification in the Buffer of Routing Switches

Abstract

The in-memory computing architecture is proposed to solve the memory access delay caused by speed mismatch between memory and processor. TCAM (Ternary content addressable memory) has the feature of in-memory computing that combines storage and computation operation, and also support of longest prefix matching (LPM), which makes it widely used in ACL (Access Control Lists), routing table lookup and packet identification. Using TCAM makes the speed of data forwarding improved and the network blocking reduced. However, as the speed of the network increases, the drawback caused by the slow update speed of TCAM is gradually not negligible, which has become one of the key factors restricts the overall velocity. To solve the problem that TCAM updates slowly, the key is to optimize the memory and computing operation. So, this paper distributes the blank space throughout the whole TCAM without knowing the number of each prefix, and adjusting the storage structure of the TCAM with additional control logic during the update process. The distributed space is automatically adjusted according to the entries that constantly update. Then, this paper constructs a TCAM with the size of 128*48, through logic synthesis, the frequency of 200MHz can be reached under the UMC 28nm process node, and 10-40 million times update operation per second can be achieved.