Inline scratch defect detection at post CMP step in FinFET device processing

Abstract

FinFETs have a complex structure which poses challenges for high volume semiconductor device processing. It is critical to mitigate these challenges for optimum device performance. CMP (Chemical Mechanical Polishing) is an integral part of semiconductor device processing. An accurate polishing becomes more and more difficult as we move toward smaller technology nodes. On one hand it is crucial to polish different layers at an optimized rate and amount; while on the other hand, this also enhances the possibility of scratching the wafer surface and the structures on top. As part of defect metrology it is of utmost importance to catch these defects inline and take timely actions to minimize the adverse effect on process yield. In certain layers the detection of these scratches are not very straight forward. Hence in this work as part of metrology inspection improvement we report the detection of this type of scratches. Here, we describe our experiment to catch scratch defects using lower wavelength inspection tools. Effective inline detection of these defects improves the device performance and accounts for yield concerns.