Abstract

A low-power FM demodulator operating across a 2–10-GHz IF bandwidth for its application in wideband heterodyne receivers is presented. A four-stage ring oscillator locks to one-fourth of the input FM, thereby reducing the energy required for wideband demodulation. The measurements show that the oscillator is capable of locking to at least a modulating frequency of 400 MHz, and further testing is limited by the FM source. Linear demodulation of the quadrature-phased outputs is realized using a low-power folded CMOS mixer, even as the fractional bandwidth of the input FM approaches unity. The inductorless 65-nm CMOS prototype occupies 0.17 mm2 and dissipates 3.2 mW from 1.2 V at the quiescent point. The measured SNR sensitivity is 8 dB and the demodulator bit-error rate is 0.1% at 10 Mb/s for a 45-mVpp input signal at IF.

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