Influence of the operating regimes of MOS transistors on the sizing and optimization of CMOS analog integrated Circuits

Abstract

During the past few years the multi-objective metaheuristics have become the most skilled and fruitful algorithms that have gained a lot of popularity of analog designers. These algorithms have been implemented into an optimization-based design tool that can be used to size difficult and complex analog circuits. The optimization-based approach can be categorized into simulation-based, equation-based, or neural-network-based device sizing. In this paper, the simulation-based approach is used to generate the non-dominated set of points of the Pareto fronts. A particular interest is accorded to the multi-objective particle swarm optimization (MOPSO) algorithm as a priori the most adequate metaheuristic to apply in the field of analog circuit sizing. The performances of MOPSO compared to the non-dominated sorting genetic algorithm (NSGA-II) are evaluated for four analog circuits at different operating regimes of transistors such as weak inversion, linear and saturation region. Performance tests of the proposed method are conducted on these circuits in 0.18 μm CMOS technology. The results show that the proposed method can be useful for the optimal design of integrated circuits, to meet the challenge of automated design in the microelectronics domain.