Abstract

Passivated contact based on a thin interfacial oxide and a highly doped polysilicon layer has emerged as the next evolutionary step to increase the efficiencies of industrial silicon solar cells. To take maximum advantage from this layer stack, it is vital to limit the losses at the metal polysilicon interface, which can be quantified as metal polysilicon recombination current density (J 0met) and contact resistivity. In cell concepts, wherein a large variety of silicon substrate surface finish can be obtained, it is essential to know how the surface finish affects the J 0met and contact resistivity. Herein, commercially available fire through silver paste and the metal‐polysilicon recombination current densities and contact resistivity are used for three different silicon substrate surface finishes, namely: planar or saw damage etched (SDE), chemically polished in acidic solution and alkaline pyramidal textured. Contact resistivity values below 3 mΩ cm2 with J 0met in order of the recombination current density of the doped region (J 0pass) are obtained for samples with planar surface for both 150 and 200 nm n+ polysilicon layer thicknesses. The results presented in this work show that the samples with flat substrate morphology outperform the samples with textured surfaces.

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