Abstract

Silicon carbide (SiC), as one of the most favorite wide band gap semiconductor materials, is often applied in power electronics nowadays. The reliability of SiC packages, however, hasn't been sufficiently investigated yet, and unexploited potentials are still expected. One critical impact parameter is the geometric chip design, from which its thickness is the most easily accessible feature. In this paper, finite element simulations are performed to investigate the influence of SiC chip thickness on the power cycling capability based on a “standard” power electronics assembly concept. The results show a potential increase of the power cycling lifetime for solder fatigue by 7 times and bond wire lift-off by 8 times when decreasing the SiC chip thickness from 350 μm to 50 μm. On the other hand, by decreasing the chip thickness, the risk for chip fracture increases due to increasing tensile stresses in the chip surface.

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